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Solved R-Jtag Jasper help needed

D7rk_N1ghtmare

D7rk_N1ghtmare

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I have been rghing and jtagging xbox 360s for a year or so now and have done every exploit but R-jtag so I am lost on what this could be. the console turns on and seems like the R-jtag chip is trying to glitch but after 8 attempts the console just goes to 3 Red lights. the console is a late 2010 Jasper 16MB and im using the R-jtag starter kit. i am doing a direct wire install on everything except for the post out qsb and am using standard non-hdmi jtag wiring (no aud clp).
 
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I have been rghing and jtagging xbox 360s for a year or so now and have done every exploit but R-jtag so I am lost on what this could be. the console turns on and seems like the R-jtag chip is trying to glitch but after 8 attempts the console just goes to 3 Red lights. the console is a late 2010 Jasper 16MB and im using the R-jtag starter kit. i am doing a direct wire install on everything except for the post out qsb and am using standard non-hdmi jtag wiring (no aud clp).
Let's see some pics of the install.
 
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yes, the wire goes to that point. i originally had the TX Jtag alt v2 but it was doing this same thing so i removed it to do a wire install
Alrighty, unsolder it from where you have it here - https://ibb.co/i5FhVn

And solder it to here:
https://i.gyazo.com/e715dd258bdd5540f45abdd63500244e.jpg

Next, touch-up these four points on your Post Out QSB:
https://i.gyazo.com/f052db6c97b318f1f2618efda4e13793.png
I know they look fine, but you never know.

Next, put 5 back to Off on the dip settings, and leave 7-8 On.

Last, make sure your J-Runner settings are as follows:
https://i.gyazo.com/b04dec72e812a42d011ec0322eaf0225.png
Assuming you copied what they look like in the picture, after you hit Create Xell-Reloaded, it should say
XeLL file created Successfully jasper_hack_aud_clamp.bin
Then go ahead and write that back to your console.

After you do all that, let me know what happens - I'll be here.
 
D7rk_N1ghtmare

D7rk_N1ghtmare

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Chip does 6 long green pulses and then console goes to three red lights after doing what you said. i did aud clamp originally with the jtag alt v2 qsb and it was doing this same thing so i switched it to non aud clamp and lifted a pad on the qsb and had to remove it. i also shortened the green and orange wire going to the chip thinking it could be a wire length issue but it does the same thing
 
also those are the one thing i know is not causing the issue. its hard to take a good picture of them but i can assure you that they are connected and when the post qsb is disconnected the chip wont flash green
 
D7rk_N1ghtmare

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Phat Selected
Version: 00
Wrong Version.
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 12 - FSB_CONFIG_RX_STATE
Post 92 - Panic - 1BL is executed on wrong CPU thread (panic)
Post 90 - Panic - VMX_ASSIST
Post 92 - Panic - 1BL is executed on wrong CPU thread (panic)
Post 90 - Panic - VMX_ASSIST
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post A0 - Panic - VERIFY_SECOTP_6
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 12 - FSB_CONFIG_RX_STATE
Post 15 - FETCH_OFFSET
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 12 - FSB_CONFIG_RX_STATE
Post 15 - FETCH_OFFSET
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 12 - FSB_CONFIG_RX_STATE
Post 15 - FETCH_OFFSET
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Most Fails(cumulative): 0xA0
Shutdown
 
Noobert

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Code:
Phat Selected
Version: 00
Wrong Version.
Phat Selected
Version: 10
Power Up
Waiting for POST to change
Post 12 - FSB_CONFIG_RX_STATE
Post 92 - Panic - 1BL is executed on wrong CPU thread (panic)
Post 90 - Panic - VMX_ASSIST
Post 92 - Panic - 1BL is executed on wrong CPU thread (panic)
Post 90 - Panic - VMX_ASSIST
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post A0 - Panic - VERIFY_SECOTP_6
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post 80
Post B0 - Panic - VERIFY_CONSOLE_TYPE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 12 - FSB_CONFIG_RX_STATE
Post 13 - FSB_CONFIG_TX_STATE
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 12 - FSB_CONFIG_RX_STATE
Post 15 - FETCH_OFFSET
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 12 - FSB_CONFIG_RX_STATE
Post 15 - FETCH_OFFSET
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Post 12 - FSB_CONFIG_RX_STATE
Post 15 - FETCH_OFFSET
Post 1B - RC4_DECRYPT
Post 1C - SHA_COMPUTE
Post 1D - SIG_VERIFY
Post 1E - BRANCH
Post 20 - CB entry point reached
Post 21 - INIT_SECOTP
Post A0 - Panic - VERIFY_SECOTP_6
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 20 - CB entry point reached
Post 30 - VERIFY_OFFSET_4BL_CD
Most Fails(cumulative): 0xA0
Shutdown
Alright if all else fails, unsolder the chip wires, and write the stock nand back to the console.

See if it boots normally, or if it RRoDs.
 
D7rk_N1ghtmare

D7rk_N1ghtmare

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I could RGH this console right now without issue but i want it to be an R-jtag, i have every other exploit but R-jtag
 
D7rk_N1ghtmare

D7rk_N1ghtmare

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Alright if all else fails, unsolder the chip wires, and write the stock nand back to the console.

See if it boots normally, or if it RRoDs.
For future notice because I could not find this out, the console is supposed to red ring at first and then you try the dip switches and change 1-6 until you get it to boot xell. My jasper is a 16mb that came out late in 2010 And it hates the recommended dip settings. got it working with default voltage and dips 3, 7, 8 booting in 1-2 glitches every time.
 
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